SANKHYA Teraptor
- Teraptor Designer IDE
- Teraptor Player (Simulator)
- Teraptor Channels
- Teraptor SDK (Compiler)
- Synthetic Processor Design
- Synthetic Processor Verification
- System Modeling Platform
- Complex Systems Modeling
- Synthetic SoC
- VHLS Engine
- Documents
- Design Flow
- Design Platform
- Benefits
- Usage Areas
- System Requirements
- Consulting
- Casestudy
- Download
Design Platform
SANKHYA TMTeraptor TM - What Is Your Innovation Platform ? TM
Teraptor Designer brings architecture specification and modeling to intelligent system design. Teraptor Designer includes languages for system modeling and a comprehensive set of meta-model driven tools for software development, model export, high level synthesis, processor design, test case generation and verification.
Teraptor Player creates fully functional virtual prototypes from Teraptor SMDL and SSDL Models.
Teraptor Channels offer fully functional processor, peripheral and system models for consumer electronics, networking, communication and automotive device development.
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Teraptor Designer IDE
Based on eclipse that can be used for creating different kinds of embedded system design projects taking advantage of the various tools that are part of Teraptor. Categories of projects that can be created and managed include the following:
- Peripheral Models (C++)
- Processor Models (SMDL)
- Hardware (Board/SoC) Models (SSDL)
- Device Drivers
- Software Applications
- Systems (Hardware + Applications)
- Verification (Automated Verification)
- Export (Export to Third Party)
- VHLS (Very High Level Synthesis) [Planned]
Next Steps
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CPU Modeling
A Processor or CPU as it is sometimes referred to is the heart of any computer. The processor reads instruction from memory, executes the instructions and writes the results back to memory. The set of instructions a processor understands is referred to as the Instruction Set. An ISA or Instruction Set Architecture refers to the set of instructions that is supported by a class of processors. Different processors can support a common instruction set but in different ways. A processor may implement a multiply instruction as a sequence of shift and add instructions or as a multiply instruction implemented using a hardware multiply unit. While the Instruction Set Architecture defines the instructions supported by a processor -- it is the MicroArchitecture that specifies how a processor implements an ISA.
Designers with understanding of computer architecture can create processor ISA models using Teraptor SMDL. These models can be used for simulation, verification, assembler and linker development, compiler development and for synthesis to synthesizable RTL.
Teraptor SMDL models can also be used seamlessly as part of larger system models created using Teraptor SSDL.
Next Steps
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System Modeling
A model is essentially an abstraction of something. In general, the highest abstraction one can create is an architectural abstraction which is normally referred to as an architectural specification. An architectural specification in its simplest form consists of a set of types (or models), one or more components of each type and their relationships. The recursive use of models in an architectural model results in hieararchical modeling. Teraptor SSDL can be used by system architects and solution architects to build complex System (SoC) and System of System Models.
Next Steps
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Teraptor Software Development Kit
Software development kit includes assembler and linker.
SMET for GCC
SMDL Model Export Tool for GCC can be used to export SMDL models to GCC target model. Upto 70% of the model can be exported automatically. This can be used to build C/C++ compilers.
SMET for LLVM
SMDL Model Export Tool for LLVM can be used to export SMDL models to LLVM target model (td files).
Teraptor C Compiler* SA
System aware edition of Teraptor C Compiler For porting operating systems.
Teraptor C Compiler* HPC
HPC edition of Teraptor C Compiler.
Teraptor Debugger
A basic system level debugger (Available on Windows only). Uses a CORBA Remote interface to connect to the system being debugged (simulator or other).
* Not generally available or planned as part of roadmap.
Next Steps
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Teraptor Player SE
Standard edition of Teraptor Player can play (simulate) multi-core systems at ISA level.
Teraptor Player XE
System edition of Teraptor Player can play multi-core systems including peripherals at ISA level.
Teraptor Player CA
Cycle aware edition of Teraptor Player.
Teraptor Player CK*
Clock aware edition of Teraptor Player (Allows multi-clock systems).
* Not generally available or planned as part of roadmap.
Next Steps
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Model Space Explorer
An SMDL model intrinsically specifies space of all possible instructions and instruction sequences that are legal for a processor. MSE can explore this space and automatically generate test sequences for a processor. In addition, by executing the test cases over Teraptor Player, standard results can be generated automatically. MSE accepts verification strategy as input enabling constrained random test generation.
MSE can also explore other (non-processor) models and can in principle be used for automating system level testing.
Verifier
A convenience tool (scripts) that can be used to automate processor verification using MSE.
Autoval
A convenience tool for executing tests and generating reports using verifier. Autoval supports options to compare multiple test runs and generate trend reports.
Next Steps
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VHLS Engine
The very high level synthesis engine is a powerful tool that can optimize and synthesize architectural models (SMDL, SSDL) to synthesizable RTL (VHDL).
The output of VHLS engine is in a form amenable for further automation to achieve 90% + automation of VHLS.
Custom VHLS Tools
Clients take advantage of SANKHYA Consulting for building custom VHLS tools.
Next Steps
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Teraptor Channels
Channels contain pre-packaged models that can be used for kickstarting new system designs. For a latest update on Teraptor Channels, please contact your sales advisor. Unless otherwise indicated, these are SMDL (processor), C++ (peripherals) or SSDL (system) models.
- Teraptor Core Channel - Lite (TCC-Lite)
Component Name Description RAM Model for introducing RAM blocks into the system. ROM Read only memory, with support for loading content from a file. USART Serial Port Console Simple device for I/O and character display LED Seven segment LED display DLX The DLX processor model Flash For adding Flash memory to the system DLX System A sample system model using DLX core - Teraptor Core Channel - CMU The TCC-CMU model allows cache memory units of various types (linear 2-way 4-way etc) to be introduced into the system. CMU includes ability to monitor cache performacne through cache performance registers.
- Teraptor Core Channel - MMU The TCC-MMU model allows memory management units that allow for segmentation to be introduced into the system.
- Teraptor Core Channel - PMU The TCC-PMU model allows memory management units that allow for paging to be introduced into the system. [Planned].
- Teraptor Core Channel - CPL* The TCC-CPL package include common set of useful peripherals
Component Name Description I2C I2C controller and Bus SPI SPI Bus DMA Direct Memory Access Device - Teraptor Automotive Channel (TAC) TAC includes models that are especially useful for automotive network modeling.
Component Name Description CAN Controller CAN Bus Controller model CAN Bus CAN Bus model - Teraptor CE Channel (TC-CE)* TC-CE includes models that are especially useful for consumer electronic design.
Component Name Description Ethernet Controller A simple ethernet controller which emulates ethernet using the controller on the host USB A simple USB controller which emulates USB using the controller on that host - Teraptor Channel for ARMThis includes the Teraptor SMDL model for the ARM v4 processor architecture - capable of running ucLinux.
- Teraptor Channel for MIPSThis includes the Teraptor SMDL model for MIPS32 processor architecture.
- Teraptor MIL Channel (TC-MIL) TC-MIL* inlcudes models that are useful in the Military and Space applications
Component Name Description MIL-STD-1553 MIL-STD-1553 Controller and Bus - Teraptor HMI Channel THMIC Includes HMI components. Includes LEDs, Display, Speedometer.
- Teraptor SIMIO Channel Includes Simulated IO components for providing streaming input / output capability driven by input and output data files.
* Not generally available or planned as part of 2012 roadmap
Additional models are planned as per roadmap and are often prioritized based on specific client requirements.
Next Steps
Do Contact Us - to request a proposal or to learn more.