S A N K H Y A
Sankhya Technologies Confidential.
Copyright (c) 2012 Sankhya Technologies Private Limited

                  SANKHYA Teraptor - FAQ 
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1. Can we use Teraptor for different processors & their configuration? I mean,
we may change the sub versions, architecture etc. of the processor.
Configuration here means, we may use only some features of the processor as
per the requirement & drop the unused (ex:Custom core of Nios II).

Yes. Teraptor includes a processor modeling language called SANKHYA Machine
Description Language (SMDL). SMDL can be used to model RISC/CISC/DSP/VLIW
processor architectures. An SMDL model of the target processor should be
created for simulating its behaviour using Teraptor. Teraptor Channels include
SMDL models for ARM v4 and MIPS32 architectures.

SMDL is a textual language and allows processor architectures to be modeled as
a hierarchy of bundles, instructions and operands.

SMDL syntax allows new variants to inherit from an existing architecture. This
can be extended to select/remove processor features.

SMDL syntax allows new variants to inherit from an existing architecture. This
can be extended to select/remove processor features.

2. Can we use Teraptor for simulation of the drivers to be developed in
Windows, Linux, RTOS?

Yes. Teraptor supports development of drivers for standalone or embedded-OS
based targets. Specific Support for native driver development is not
available.

3. Can we log the simulation wave forms for debugging the exact problems that
may occur with timing releated? Can we check read/write cycles, address/data
on the bus?

Teraptor Player can be used to create virtual prototypes from cycle-accurate
models. To simulate a specific bus, the bus model has to be created first.
Some (minor) extensions will be required to view data inside a specific device
or bus.

4. Can we use it for PCI device drivers development?

This can be done by modeling the PCI bus and the required PCI device using
Teraptor device API. These models can be used as part of a system to create a
virtual platform. The driver can then be tested on this virtual platform.
Support for these models is not available out-of-the-box.

5. Can we use it for FPGAs? We design the hardware device (PCI mapped)
functionalities & program in FPGA.

It is possible to translate the Teraptor processor/system models into RTL
(VHDL/Verilog). This is currently offered as custom-tool-development service.
To simulate the FPGA behaviour, corresponding C++ models will have to be
created for use with Teraptor Player.

6. Can we use it for customized devices? We use very customized devices for
our products.

Yes, Teraptor can be used to create customized device models using C/C++ and
these models can then be used as part of a system. Teraptor includes a C++
device API using which new devices can be described. These devices can then be
built into DLLs and included a part of a system description.

7. Can we do driver development using complete simulation. Main reason is our
client develops hardware at Japan & we develop only the software drivers for
the at onsite. Since, there is a dependency; we would like to check for
simulation kind of development at our ODC by bringing some hardware design
related work to our ODC.

Yes. Terptor can be used to model complete systems consisting of one or more
processing elements and peripheral devices. A virtual platform can be created
from a system description and this platform can be used to develop/test
drivers and applications.
  1. Terptor includes a sample (standalone) driver for a USART device.
  2. UcLinux has been successfully ported to and run on an ARMv4 based
     Teraptor virtual board.
  3. Support for asynchronous events (interrupts and exceptions) are part of
     the most recent development version of Teraptor (Teraptor 3.2).